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Using a Quantum 984 HSBY System
76
840 USE 106 00 January 2003
Command Register
Command
Register
The State RAM
Transfer Area
The command register must be contained within the range of 4x registers in the state
RAM transfer area.
A fixed block of up to 12K words in state RAM is specified as the transfer area. It
consists of the following:
All the 0x discrete outputs in state RAM up to a maximum of 8192, including their
associated histories
All the 1x discrete inputs in state RAM up to a maximum of 8192, including their
associated histories
If the total number of registers (3x and 4x combined) implemented in state RAM
is 10,000 or less, then all the registers plus the up/down counter history table
If the total number of registers (3x and 4x combined) implemented in state RAM
is greater than 10,000, then a total of 10,000 is transferred, in accordance with
the previously described formula. See
Default Transfer Area, p. 38
.
Nontransfer Area
Within the State
RAM Transfer
Area
You also must define a nontransfer area in the middle node of the the CHS
instruction block. A nontransfer area:
is a tool to reduce scan time
is located entirely within the range of 4x registers in the state RAM transfer area
which are transferred on every scan
consists of a block of four or more 4x registers
allows the user to monitor the status of the Hot Standby system (third register of
non-transfer area)
CAUTION
Command Register Hazard
If you use the command register to enable the keyswitch override while
the Hot Standby system is running, the Primary controller immediately
reads bits 14 and 15 to determine its own state and the state of the
Standby.
If both bits are set to 0, a switchover occurs and the former Primary
CPU goes offline. The new Primary CPU continues to operate.
Failure to follow this precaution can result in injury or equipment
damage.