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Theory of 984 HSBY Operation
36
840 USE 106 00 January 2003
The State RAM Transfer and Scan Time
Reduce Scan
Time
This section describes manipulating the state RAM transfer to reduce scan time
As the simplified block diagram below shows, all 0x references in the state RAM
transfer area are transferred first, then all 1x references, followed by all the 3x
references, and finally all the 4x references:
Note: The state RAM transfer area contains all the state RAM values that are
passed between the Primary and Standby controllers. The size of the transfer area
may be as large as the total size of your controller’s state RAM or a portion
containing critical I/O reference data types.
0nnnnn
1nnnnn
3nnnnn
4nnnnn
Where nnnnn is a
multiple of 16
Total number of discrete
outputs transferred
Total number of discrete
inputs transferred
Total number of register
inputs transferred
Total number of register
outputs transferred