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57GFK-0827 Chapter 4 Operation
Resynchronization of the Redundant CPU
Whenever a CPU is attempting to get back in synchronization with the currently active
CPU, a resynchronization process will occur. This resynchronization process will occur
any time a CPU performs a STOP to RUN mode transition. This process will start by
determining which role each CPU is to play. The Primary Unit (with Serial Bus Address
31) is always preferred and a switch will occur from the Secondary Unit anytime the
primary CPU performs a resynchronization. However, until the resynchronization is
complete, the primary CPU will play the role of the backup. The Primary unit will
switch to active just prior to logic execution. Outputs will be driven that sweep by the
primary unit.
If both systems are transitioning at the same time, then the primary CPU will become
the active CPU and the secondary will become the backup.
During the resynchronization process, data is exchanged between the CPUs regarding
roles and configuration. If the transitioning CPU detects that the role or configuration is
not in agreement, then that CPU will not be permitted to go to RUN mode. If both
CPUs are transitioning, then neither CPU will be permitted to go to RUN mode. The
following items must be in agreement:
1. One CPU must be configured as Primary, the other as Secondary.
2. Both CPUs must be configured for the same redundancy scheme; but not necessarily
the same release.
3. Both CPUs must have the same Shared I/O redundancy points configured.
4. Point fault configuration must match. If point faults are configured on one CPU,
they must also be configured on the other if %I, %Q, %AI, or %AQ data is
transferred.
At this point, the active unit is the one that has been in control and the backup unit is the
one that is resynchronizing. The transfer of all configured control data from the active
unit to the backup will occur provided both units are not transitioning at the same time
(the transfer always goes from the running unit to the resynching unit. In addition to
the configured control data, the FST_SCN and FST_EXE %S references as well as
internal timer information for each common (that is, present in both CPUs) sub-block are
transferred from active to backup. Only the internal timers and FST_EXE references for
program blocks with the same name will be transferred from the active to the backup
CPU. The result of this is that if one CPU is already on-line and the other is transitioning
to RUN mode, its FST_SCN and matching FST_EXE bits will not be set on its first scan.
These bits are considered system bits and will only be set if one unit comes up alone, or if
both units come up together.
No transfer of data occurs at this point if both units are transitioning. Instead, the
normal clearing of non-retentive data will happen and the FST_SCN and FST_EXE
references will be set as in the non-redundant simplex CPU models.
The timer information and the FST_EXE %S reference bits will not be continuously
transferred. The timer information and FST_EXE references will be transferred only at
resynchronization time and the timer information will be calculated each sweep from
the universal ”Start of Sweep Time” that is transferred every sweep.