Section 14 Realtime Clock
R01UH0134EJ0400 Rev. 4.00 Page 695 of 2108
Sep 24, 2014
SH7262 Group, SH7264 Group
14.3.17 Control Register 2 (RCR2)
RCR2 is a register for periodic interrupt control, 30-second adjustment, divider circuit RESET,
and count control.
RCR2 is initialized by a power-on reset or in deep standby mode. Bits other than the RTCEN and
START bits are initialized by a manual reset.
01234567
10010000
R/W R/W R/W R/WR/WR/WR/WR/W
BIt:
Initial value:
R/W:
PEF PES[2:0] RTCEN ADJ RESET START
Bit Bit Name
Initial
Value
R/W Description
7 PEF 0 R/W Periodic Interrupt Flag
Indicates interrupt generation with the period designated
by the PES2 to PES0 bits. When set to 1, PEF generates
periodic interrupts.
0: Interrupts not generated with the period designated by
the bits PES2 to PES0.
[Clearing condition]
When 0 is written to PEF
1: Interrupts generated with the period designated by the
PES2 to PES0 bits.
[Setting condition]
When an interrupt is generated with the period
designated by the bits PES0 to PES2 or when 1 is
written to the PEF flag