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R01UH0134EJ0400 Rev. 4.00 Page xi of xl
Sep 24, 2014
Contents
Section 1 Overview ................................................................................................ 1
1.1 SH7262/7264 Features .......................................................................................................... 1
1.2 Product Lineup .................................................................................................................... 12
1.3 Block Diagram .................................................................................................................... 14
1.4 Pin Assignment ................................................................................................................... 15
1.5 Pin Functions ...................................................................................................................... 19
1.6 List of Pins .......................................................................................................................... 29
Section 2 CPU ...................................................................................................... 49
2.1 Register Configuration ........................................................................................................ 49
2.1.1 General Registers ................................................................................................ 49
2.1.2 Control Registers ................................................................................................ 50
2.1.3 System Registers ................................................................................................. 52
2.1.4 Register Banks .................................................................................................... 53
2.1.5 Initial Values of Registers ................................................................................... 53
2.2 Data Formats ....................................................................................................................... 54
2.2.1 Data Format in Registers .................................................................................... 54
2.2.2 Data Formats in Memory .................................................................................... 54
2.2.3 Immediate Data Format ...................................................................................... 55
2.3 Instruction Features ............................................................................................................. 56
2.3.1 RISC-Type Instruction Set .................................................................................. 56
2.3.2 Addressing Modes .............................................................................................. 60
2.3.3 Instruction Format ............................................................................................... 65
2.4 Instruction Set ..................................................................................................................... 69
2.4.1 Instruction Set by Classification ......................................................................... 69
2.4.2 Data Transfer Instructions ................................................................................... 75
2.4.3 Arithmetic Operation Instructions ...................................................................... 79
2.4.4 Logic Operation Instructions .............................................................................. 82
2.4.5 Shift Instructions ................................................................................................. 83
2.4.6 Branch Instructions ............................................................................................. 84
2.4.7 System Control Instructions ................................................................................ 85
2.4.8 Floating-Point Operation Instructions ................................................................. 87
2.4.9 FPU-Related CPU Instructions ........................................................................... 89
2.4.10 Bit Manipulation Instructions ............................................................................. 90
2.5 Processing States ................................................................................................................. 92