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Section 11 Multi-Function Timer Pulse Unit 2
Page 584 of 2108 R01UH0134EJ0400 Rev. 4.00
Sep 24, 2014
SH7262 Group, SH7264 Group
Channel
Name
Interrupt Source
Interrupt
Flag
Activation of
Direct
Memory
Access
Controller
Priority
2 TGIA_2 TGRA_2 input capture/compare match TGFA_2 Possible High
TGIB_2 TGRB_2 input capture/compare match TGFB_2 Not possible
TCIV_2 TCNT_2 overflow TCFV_2 Not possible
TCIU_2 TCNT_2 underflow TCFU_2 Not possible
3 TGIA_3 TGRA_3 input capture/compare match TGFA_3 Possible
TGIB_3 TGRB_3 input capture/compare match TGFB_3 Not possible
TGIC_3 TGRC_3 input capture/compare match TGFC_3 Not possible
TGID_3 TGRD_3 input capture/compare match TGFD_3 Not possible
TCIV_3 TCNT_3 overflow TCFV_3 Not possible
4 TGIA_4 TGRA_4 input capture/compare match TGFA_4 Possible
TGIB_4 TGRB_4 input capture/compare match TGFB_4 Not possible
TGIC_4 TGRC_4 input capture/compare match TGFC_4 Not possible
TGID_4 TGRD_4 input capture/compare match TGFD_4 Not possible
TCIV_4 TCNT_4 overflow/underflow TCFV_4 Not possible Low
Note: This table shows the initial state immediately after a reset. The relative channel priorities
can be changed by the interrupt controller.
(1) Input Capture/Compare Match Interrupt
An interrupt is requested if the TGIE bit in TIER is set to 1 when the TGF flag in TSR is set to 1
by the occurrence of a TGR input capture/compare match on a particular channel. The interrupt
request is cleared by clearing the TGF flag to 0. This module has eighteen input capture/compare
match interrupts, six for channel 0, four each for channels 3 and 4, and two each for channels 1
and 2. The TGFE_0 and TGFF_0 flags in channel 0 are not set by the occurrence of an input
capture.
(2) Overflow Interrupt
An interrupt is requested if the TCIEV bit in TIER is set to 1 when the TCFV flag in TSR is set to
1 by the occurrence of TCNT overflow on a channel. The interrupt request is cleared by clearing
the TCFV flag to 0. This module has five overflow interrupts, one for each channel.