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Page 2086 of 2108 R01UH0134EJ0400 Rev. 4.00
Sep 24, 2014
Item Page Revision (See Manual for Details)
36.2 Register Bits 1885 Table amended
Module Name
Register
Abbreviation
Bit 31/23/15/7 Bit 30/22/14/6 Bit 29/21/13/5 Bit 28/20/12/4 Bit 27/19/11/3 Bit 26/18/10/2 Bit 25/17/9/1 Bit 24/16/8/0
Bus state
controller
CS5WCR ⎯⎯ ⎯ ⎯ ⎯ ⎯ ⎯ ⎯
⎯⎯ SA[1] SA[0] ⎯ ⎯ ⎯ ⎯
⎯ TED[3] TED[2] TED[1] TED[0] PCW[3] PCW[2] PCW[1]
PCW[0] WM ⎯ ⎯ THE[3] THE[2] THE[1] THE[0]
CS6WCR ⎯ ⎯ ⎯ ⎯ ⎯⎯ ⎯ ⎯
⎯ ⎯ SA[1] SA[0] ⎯ ⎯ ⎯ ⎯
⎯ TED[3] TED[2] TED[1] TED[0] PCW[3] PCW[2] PCW[1]
PCW[0] WM ⎯ ⎯ THE[3] THE[2] THE[1] THE[0]
1910 Table amended
Module Name
Register
Abbreviation
Bit 31/23/15/7 Bit 30/22/14/6 Bit 29/21/13/5 Bit 28/20/12/4 Bit 27/19/11/3 Bit 26/18/10/2 Bit 25/17/9/1 Bit 24/16/8/0
Serial
communication
interface with
FIFO
SCEMR_3 ⎯ ⎯ ⎯ ⎯ ⎯ ⎯ ⎯ ⎯
BGDM ⎯ ⎯ ⎯ ⎯ ⎯ ⎯ ABCS
SCSMR_4 ⎯ ⎯ ⎯ ⎯⎯ ⎯ ⎯ ⎯
C/A CHR PE O/E STOP ⎯ CKS[1] CKS[0]
1922 Table amended
Module Name
Register
Abbreviation
Bit 31/23/15/7 Bit 30/22/14/6 Bit 29/21/13/5 Bit 28/20/12/4 Bit 27/19/11/3 Bit 26/18/10/2 Bit 25/17/9/1 Bit 24/16/8/0
Controller area
network
MBn_CONTROL
1_0 (n =0)
⎯ ⎯ NMC ⎯ ⎯ MBC[2] MBC[1] MBC[0]
⎯ ⎯ ⎯ ⎯ DLC[3] DLC[2] DLC[1] DLC[0]
1923 Table amended
BCR1_1 TSEG1[3] TSEG1[2] TSEG1[1] TSEG1[0] TSEG2[2] TSEG2[1] TSEG2[0]
Module Name
Register
Abbreviation
Bit 31/23/15/7 Bit 30/22/14/6 Bit 29/21/13/5 Bit 28/20/12/4 Bit 27/19/11/3 Bit 26/18/10/2 Bit 25/17/9/1 Bit 24/16/8/0
Controller
area network
MBn_TTCONTR
OL_0
(n = 24 to 29
TTW[1] TTW[0] OFFSET[5] OFFSET[4] OFFSET[3] OFFSET[2] OFFSET[1] OFFSET[0]
⎯ ⎯ ⎯ ⎯ ⎯ REP_
FACTOR[2]
REP_
FACTOR[1]
REP_
FACTOR[0]
MCR_1 MCR15 MCR14 ⎯ ⎯ ⎯ TST[2] TST[1] TST[0]
MCR7 MCR6 MCR5 ⎯ ⎯ MCR2 MCR1 MCR0
GSR_1 ⎯ ⎯ ⎯ ⎯ ⎯ ⎯ ⎯ ⎯
⎯ ⎯ GSR5 GSR4 GSR3 GSR2 GSR1 GSR0
⎯
⎯ ⎯ SJW[1] SJW[0] ⎯ ⎯ ⎯ BSP
BCR0_1 ⎯ ⎯ ⎯ ⎯ ⎯ ⎯ ⎯ ⎯
BRP[7] BRP[6] BRP[5] BRP[4] BRP[3] BRP[2] BRP[1] BRP[0]
1924 Table amended
Module Name
Register
Abbreviation
Bit 31/23/15/7 Bit 30/22/14/6 Bit 29/21/13/5 Bit 28/20/12/4 Bit 27/19/11/3 Bit 26/18/10/2 Bit 25/17/9/1 Bit 24/16/8/0
Controller area
network
TTCR0_1 TCR
15 TCR
14 TCR
13 TCR
12 TCR
11 TCR
10 ⎯⎯
⎯ TCR
6 TPSC
5 TPSC
4 TPSC
3 TPSC
2 TPSC
1 TPSC
0
CMAX_TEW_1 ⎯⎯⎯⎯
⎯
⎯ CMAX[2] CMAX[1] CMAX[0]
⎯⎯⎯
RFTROFF_1 RFTROFF[7] RFTROFF[6] RFTROFF[5] RFTROFF[4] RFTROFF[3] RFTROFF[2] RFTROFF[1] RFTROFF[0]
⎯⎯⎯⎯⎯⎯⎯⎯
TSR_1 ⎯⎯⎯⎯⎯⎯⎯⎯
⎯⎯⎯ TSR
4 TSR
3 TSR
2 TSR
1 TSR
0
MBIMR0_1 MBIMR0[15] MBIMR0[14] MBIMR0[13] MBIMR0[12] MBIMR0[11] MBIMR0[10] MBIMR0[9] MBIMR0[8]
MBIMR0[7] MBIMR0[6] MBIMR0[5] MBIMR0[4] MBIMR0[3] MBIMR0[2] MBIMR0[1] MBIMR0[0]
TEW[3] TEW[2] TEW[1] TEW[0]