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Section 15 Serial Communication Interface with FIFO
R01UH0134EJ0400 Rev. 4.00 Page 727 of 2108
Sep 24, 2014
SH7262 Group, SH7264 Group
Bit Bit Name
Initial
Value R/W Description
5 TDFE 1 R/(W)* Transmit FIFO Data Empty
Indicates that data has been transferred from the
transmit FIFO data register (SCFTDR) to the transmit
shift register (SCTSR), the quantity of data in
SCFTDR has become less than the transmission
trigger number specified by the TTRG[1:0] bits in the
FIFO control register (SCFCR), and writing of transmit
data to SCFTDR is enabled.
0: The quantity of transmit data written to SCFTDR is
greater than the specified transmission trigger
number
[Clearing conditions]
TDFE is cleared to 0 when data exceeding the
specified transmission trigger number is written to
SCFTDR after 1 is read from TDFE and then 0 is
written
TDFE is cleared to 0 when direct memory access
controller is activated by transmit FIFO data empty
interrupt (TXI) and write data exceeding the
specified transmission trigger number to SCFTDR
1: The quantity of transmit data in SCFTDR is less
than or equal to the specified transmission trigger
number*
1
[Setting conditions]
TDFE is set to 1 by a power-on reset
TDFE is set to 1 when the quantity of transmit
data in SCFTDR becomes less than or equal to
the specified transmission trigger number as a
result of transmission
Note: 1. Since SCFTDR is a 16-byte FIFO register,
the maximum quantity of data that can be
written when TDFE is 1 is "16 minus the
specified transmission trigger number". If
an attempt is made to write additional
data, the data is ignored. The quantity of
data in SCFTDR is indicated by the upper
8 bits of SCFDR.