Section 20 Controller Area Network
Page 1006 of 2108 R01UH0134EJ0400 Rev. 4.00
Sep 24, 2014
SH7262 Group, SH7264 Group
Bit10:
TST2
Bit9:
TST1
Bit8:
TST0 Description
0 0 0 Normal Mode (initial value)
0 0 1 Listen-Only Mode (Receive-Only Mode)
0 1 0 Self Test Mode 1 (External)
0 1 1 Self Test Mode 2 (Internal)
1 0 0 Write Error Counter
1 0 1 Error Passive Mode
1 1 0 Setting prohib ited
1 1 1 Setting prohib ited
Bit 7 — Auto-wake Mode (MCR7): MCR7 enables or disables the Auto-wake mode. If this bit is
set, this module automatically cancels the sleep mode (MCR5) by detecting CAN bus activity
(dominant bit). If MCR7 is cleared this module does not automatically cancel the sleep mode.
This module cannot store the message that wakes it up.
Note: This bit can be modified only Reset or Halt mode.
Bit7: MCR7 Description
0 Auto-wake by CAN bus activity disabled (Initial value)
1 Auto-wake by CAN bus activity enabled
Bit 6 — Halt during Bus Off (MCR6): MCR6 enables or disables entering Halt mode
immediately when MCR1 is set during Bus Off. This bit can be modified only in Reset or Halt
mode. Please note that when Halt is entered in Bus Off the CAN engine is also recovering
immediately to Error Active mode.
Bit6: MCR6 Description
0 If MCR[1] is set, this module will not enter Halt mode during Bus Off but wait
up to end of recovery sequence (Initial value)
1 Enter Halt mode immediately during Bus Off if MCR[1] or MCR[14] are
asserted.