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R01UH0134EJ0400 Rev. 4.00 Page xxix of xl
Sep 24, 2014
23.3.38 Post-ECC Correction Subheader: Channel Number (Byte 21)
Data Register (SHEAD25) .............................................................................. 1229
23.3.39 Post-ECC Correction Subheader: Sub-Mode (Byte 22)
Data Register (SHEAD26) .............................................................................. 1229
23.3.40 Post-ECC Correction Subheader: Data Type (Byte 23)
Data Register (SHEAD27) .............................................................................. 1230
23.3.41 Automatic Buffering Setting Control Register 0 (CBUFCTL0) ..................... 1230
23.3.42 Automatic Buffering Start Sector Setting:
Minutes Control Register (CBUFCTL1) ........................................................ 1232
23.3.43 Automatic Buffering Start Sector Setting:
Seconds Control Register (CBUFCTL2) ........................................................ 1232
23.3.44 Automatic Buffering Start Sector Setting:
Frames Control Register (CBUFCTL3) .......................................................... 1233
23.3.45 ISY Interrupt Source Mask Control Register (CROMST0M) ........................ 1233
23.3.46 CD-ROM Decoder Reset Control Register (ROMDECRST) ......................... 1234
23.3.47 CD-ROM Decoder Reset Status Register (RSTSTAT) .................................. 1235
23.3.48 Serial Sound Interface Data Control Register (SSI) ........................................ 1235
23.3.49 Interrupt Flag Register (INTHOLD) ............................................................... 1238
23.3.50 Interrupt Source Mask Control Register (INHINT) ........................................ 1239
23.3.51 CD-ROM Decoder Stream Data Input Register (STRMDIN0) ...................... 1240
23.3.52 CD-ROM Decoder Stream Data Input Register (STRMDIN2) ...................... 1240
23.3.53 CD-ROM Decoder Stream Data Output Register (STRMDOUT0) ................ 1241
23.4 Operation ........................................................................................................................ 1242
23.4.1 Endian Conversion for Data in the Input Stream ............................................ 1242
23.4.2 Sync Code Maintenance Function .................................................................. 1243
23.4.3 Error Correction .............................................................................................. 1248
23.4.4 Automatic Decoding Stop Function ................................................................ 1249
23.4.5 Buffering Format ............................................................................................ 1250
23.4.6 Target-Sector Buffering Function ................................................................... 1252
23.5 Interrupt Sources ............................................................................................................. 1254
23.5.1 Interrupt and DMA Transfer Request Signals ................................................ 1254
23.5.2 Timing of Status Registers Updates ................................................................ 1256
23.6 Usage Notes .................................................................................................................... 1256
23.6.1 Stopping and Resuming Buffering Alone during Decoding ........................... 1256
23.6.2 When CROMST0 Status Register Bits are Set ............................................... 1256
23.6.3 Link Blocks ..................................................................................................... 1257
23.6.4 Stopping and Resuming CD-DSP Operation .................................................. 1257
23.6.5 Note on Clearing the IREADY Flag ............................................................... 1257
23.6.6 Note on Stream Data Transfer (1) ................................................................... 1258
23.6.7 Note on Stream Data Transfer (2) ................................................................... 1258