Filter
Top Products
Section 20 Controller Area Network
R01UH0134EJ0400 Rev. 4.00 Page 1053 of 2108
Sep 24, 2014
SH7262 Group, SH7264 Group
Self Test Mode 2: This module generates its own Acknowledge bit, and can store its own
messages into a reception mailbox (if required). The CRxn/CTxn (n = 0, 1)
pins do not need to be connected to the CAN bus or any external devices,
as the internal CTxn (n = 0, 1) is looped back to the internal CRxn (n = 0,
1). CTxn (n = 0, 1) pin outputs only recessive bits and CRxn (n = 0, 1) pin
is disabled.
Write Error Counter: TEC/REC can be written in this mode. This module can be forced to
become an Error Passive mode by writing a value greater than 127 into the
Error Counters. The value written into TEC is used to write into REC, so
only the same value can be set to these registers. Similarly, this module
can be forced to become an Error Warning by writing a value greater than
95 into them.
This module needs to be in Halt Mode when writing into TEC/REC
(MCR1 must be "1" when writing to the Error Counter). Furthermore this
test mode needs to be exited prior to leaving Halt mode.
Error Passive Mode: This module can be forced to enter Error Passive mode.
Note: The REC will not be modified by implementing this Mode.
However, once running in Error Passive Mode, the REC will increase
normally should errors be received. In this Mode, this module will enter
BusOff if TEC reaches 256 (Dec). However when this mode is used this
module will not be able to become Error Active. Consequently, at the end
of the Bus Off recovery sequence, this module will move to Error Passive
and not to Error Active.
When message error occurs, IRR13 is set in all test modes.