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Section 23 CD-ROM Decoder
R01UH0134EJ0400 Rev. 4.00 Page 1199 of 2108
Sep 24, 2014
SH7262 Group, SH7264 Group
Name Abbreviation R/W
Initial
Value Address
Access
Size
Post-ECC correction subheader:
channel number (byte 21) data register
SHEAD25 R H'00 H'FFFF902D 8
Post-ECC correction subheader:
sub-mode (byte 22) data register
SHEAD26 R H'00 H'FFFF902E 8
Post-ECC correction subheader:
data type (byte 23) data register
SHEAD27 R H'00 H'FFFF902F 8
Automatic buffering setting control register CBUFCTL0 R/W H'04 H'FFFF9040 8
Automatic buffering start sector setting:
minutes control register
CBUFCTL1 R/W H'00 H'FFFF9041 8
Automatic buffering start sector setting:
seconds control register
CBUFCTL2 R/W H'00 H'FFFF9042 8
Automatic buffering start sector setting:
frames control register
CBUFCTL3 R/W H'00 H'FFFF9043 8
ISY interrupt source mask control register CROMST0M R/W H'00 H'FFFF9045 8
CD-ROM decoder reset control register ROMDECRST R/W H'00 H'FFFF9100 8
CD-ROM decoder reset status register RSTSTAT R H'00 H'FFFF9101 8
Serial sound interface data control register SSI R/W H'18 H'FFFF9102 8
Interrupt flag register INTHOLD R/W H'00 H'FFFF9108 8
Interrupt source mask control register INHINT R/W H'00 H'FFFF9109 8
CD-ROM decoder stream data input
register
STRMDIN0 R/W H'0000 H'FFFF9200 Read:
16
Write:
16/32
CD-ROM decoder stream data input
register
STRMDIN2 R/W H'0000 H'FFFF9202 16
CD-ROM decoder stream data output
register
STRMDOUT0 R H'0000 H'FFFF9204 16, 32