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Section 37 Electrical Characteristics
Page 2010 of 2108 R01UH0134EJ0400 Rev. 4.00
Sep 24, 2014
SH7262 Group, SH7264 Group
Notes: 1. An address pin to be connected to pin A10 of SDRAM.
2. The waveform for DACKn and TENDn is when active low is specified.
Tr c Tr c TrcTr rTpwTp
CKIO
A25 to A0
CSn
RD/WR
A12/A11
*
1
D15 to D0
RAS
CAS
(Hi-Z)
BS
CKE
DQMxx
DACKn
TENDn
t
AD3
t
AD3
t
CSD2
t
CSD2
t
CSD2
t
CSD2
t
CASD2
t
DQMD2
t
CASD2
t
CASD2
t
RASD2
t
CKED2
t
CKED2
t
RASD2
t
RASD2
t
RWD2
t
RWD2
t
RASD2
t
AD3
t
AD3
*
2
Figure 37.35 Synchronous DRAM Self-Refreshing Timing in Low-Frequency Mode
(WTRP = 2 Cycles)