Renesas R5S72626 Doll User Manual


  Open as PDF
of 2152
 
Section 26 USB 2.0 Host/Function Module
R01UH0134EJ0400 Rev. 4.00 Page 1453 of 2108
Sep 24, 2014
SH7262 Group, SH7264 Group
Table 26.10 Meaning of BSTS Bit
DIR Bit BFRE Bit DCLRM Bit Meaning of BSTS Bit
0 0 0 1: The received data can be read from the FIFO buffer.
0: The received data has been completely read from the
FIFO buffer.
1 Setting prohibited
1 0 1: The received data can be read from the FIFO buffer.
0: BCLR has been set to 1 after the received data has
been completely read from the FIFO buffer.
1 1: The received data can be read from the FIFO buffer.
0: The received data has been completely read from the
FIFO buffer.
1 0 0 1: The transmit data can be written to the FIFO buffer.
0: The transmit data has been completely written to the
FIFO buffer.
1 Setting prohibited
1 0 Setting prohibited
1 Setting prohibited
Table 26.11(1) Information Cleared by this Module by Setting ACLRM = 1
No. Information Cleared by ACLRM Bit Manipulation
1 All the information in the FIFO buffer assigned to the pertinent pipe (all the information in
two FIFO buffer planes in double buffer mode)
2 The interval count value when the pertinent pipe is for isochronous transfer
Table 26.11(2) Cases That Require Setting ACLRM to 1
No. Cases in which Clearing the Information is Necessary
1 When it is necessary to clear all the information assigned to the pertinent pipe from the
FIFO buffer
2 When the interval count value is to be reset
3 When the BFRE setting is modified
4 When the DBLB setting is modified
5 When the transaction count function is forcibly terminated