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Section 19 Serial I/O with FIFO
Page 948 of 2108 R01UH0134EJ0400 Rev. 4.00
Sep 24, 2014
SH7262 Group, SH7264 Group
19.3.3 Transmit Data Register (SITDR)
SITDR specifies transmit data. The data set in SITDR will be stored in the transmit FIFO.
SITDR is initialized by a transmit reset caused by the TXRST bit in SICTR.
31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16
Bit:
Initial Value:
R/W:
Undefined Undefined Undefined Undefined Undefined Undefined Undefined Undefined Undefined Undefined Undefined Undefined Undefined Undefined Undefined Undefined
WWWWWWWWWWWWWWWW
SITDL[15:0]
15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0
Bit:
Initial Value:
R/W:
Undefined Undefined Undefined Undefined Undefined Undefined Undefined Undefined Undefined Undefined Undefined Undefined Undefined Undefined Undefined Undefined
WWWWWWWWWWWWWWWW
SITDR[15:0]
Bit Bit Name
Initial
Value R/W Description
31 to 16 SITDL
[15:0]
Undefined W Left-Channel Transmit Data
Specify data to be transmitted from the SIOFTxD pin as
left-channel data. The position of the left-channel data
in the transmit frame is specified by the TDLA bit in
SITDAR.
These bits are valid only when the TDLE bit in
SITDAR is set to 1.
15 to 0 SITDR
[15:0]
Undefined W Right-Channel Transmit Data
Specify data to be transmitted from the SIOFTxD pin as
right-channel data. The position of the right-channel
data in the transmit frame is specified by the TDRA bit
in SITDAR.
These bits are valid only when the TDRE bit is set to
1 and the TLREP bit is cleared to 0 in SITDAR.