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Section 16 Renesas Serial Peripheral Interface
R01UH0134EJ0400 Rev. 4.00 Page 775 of 2108
Sep 24, 2014
SH7262 Group, SH7264 Group
Section 16 Renesas Serial Peripheral Interface
This LSI includes two-channel Renesas serial peripheral interfaces.
This module is capable of full-duplex serial communication.
16.1 Features
This module has the following features.
SPI transfer functions
Use of MOSI (master out/slave in), MISO (master in/slave out), SSL (slave select), and
RSPCK (SPI clock) signals allow for serial communications through SPI operation (four-wire
method).
Capable of serial communications in master/slave mode
Supports mode fault error detection (only in SPI slave mode)
Supports overrun error detection (only in SPI slave mode)
Switching of the polarity of the serial transfer clock
Switching of the clock phase of serial transfer
Data format
MSB-first/LSB-first selectable
Transfer bit-length is selectable as 8, 16, or 32 bits.
Bit rate
RSPCK can be divided by a maximum of 4096 in master mode
RSPCK can be generated by dividing B by the on-chip baud rate generator.
An externally input clock can be used as a serial clock.
Buffer configuration
8 bytes for transmission and 32 bytes for reception.