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Section 18 Serial Sound Interface
R01UH0134EJ0400 Rev. 4.00 Page 915 of 2108
Sep 24, 2014
SH7262 Group, SH7264 Group
Bit Bit Name
Initial
Value R/W Description
16 TDE 1 R/(W)* 0: Number of data bytes for transmission in SSIFTDR is
greater than the set transmit trigger number.
[Clearing conditions]
0 is written to TDE after data of the number of bytes
larger than the set transmit trigger number is written
to SSIFTDR.
The direct memory access controller is activated by
transmit data empty (TXI) interrupt, and data of the
number of bytes larger than the set transmit trigger
number is written to SSIFTDR.
1: Number of data bytes for transmission in SSIFTDR is
equal to or less than the set transmit trigger number.
*
[Setting conditions]
Power-on reset
Number of transmission data bytes to be stored in
SSIFTDR has become equal to or less than the set
transmit trigger number.
Note: 1. Since SSIFTDR is an 8-stage FIFO register,
the amount of data that can be written to it
while TDE = 1 is "8 – transmit trigger number
to be specified" bytes at maximum. Writing
more data will be ignored. The number of data
bytes in SSIFTDR is indicated in the TDC bits
in SSIFSR.
15 to 12 All 0 R Reserved
These bits are always read as 0. The write value should
always be 0.
11 to 8 RDC[3:0] 0000 R Number of Data Bytes Stored in SSIFRDR
RDC[3:0] = H'0 indicates no received data.
RDC[3:0] = H'8 indicates that 32 bytes of received data
is stored in SSIFRDR.
7 to 1 All 0 R Reserved
This bit is always read as 0. The write value should
always be 0.