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Section 16 Renesas Serial Peripheral Interface
R01UH0134EJ0400 Rev. 4.00 Page 831 of 2108
Sep 24, 2014
SH7262 Group, SH7264 Group
(2) Mode Fault Error
When the MSTR bit is 0, this module operates in slave mode. This module detects a mode fault
error if the SSL input signal is negated during the serial transfer period (from the time the driving
of valid data is started to the time the final valid data is fetched) when the MODFEN bit is 1 in
slave mode.
Upon detecting a mode fault error, this module stops driving of the output signals and clears the
SPE bit in SPCR to 0. When the SPE bit is cleared to 0, the function of this module is disabled and
this module stops driving external signals. For details of disabling the function of this module by
clearing the SPE bit to 0, see section 16.4.7, Initialization.
The occurrence of a mode fault error can be checked either by reading SPSR or by using an error
interrupt and reading SPSR. When using an error interrupt, set the SPEIE bit in the control register
(SPCR) to 1. To detect a mode fault error without using an error interrupt, it is necessary to poll
SPSR.
When the MODF bit is 1, writing 1 to the SPE bit is ignored. To enable the function of this
module after the detection of a mode fault error, the MODF bit must be set to 0. The MODF bit is
cleared to 0 under the following conditions:
After SPSR is read in a condition where the MODF bit has turned 1, 0 is written to the MODF
bit.
Power-on reset