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R01UH0134EJ0400 Rev. 4.00 Page xxxvii of xl
Sep 24, 2014
33.2.10 System Control Register 1 (SYSCR1) ............................................................ 1789
33.2.11 System Control Register 2 (SYSCR2) ............................................................ 1790
33.2.12 System Control Register 3 (SYSCR3) ............................................................ 1791
33.2.13 System Control Register 4 (SYSCR4) ............................................................ 1793
33.2.14 System Control Register 5 (SYSCR5) ............................................................ 1794
33.2.15 On-Chip Data-Retention RAM Area Setting Register (RRAMKP) ................ 1796
33.2.16 Deep Standby Control Register (DSCTR) ...................................................... 1798
33.2.17 Deep Standby Cancel Source Select Register (DSSSR) ................................. 1799
33.2.18 Deep Standby Cancel Edge Select Register (DSESR) .................................... 1801
33.2.19 Deep Standby Cancel Source Flag Register (DSFR) ...................................... 1803
33.2.20 XTAL Crystal Oscillator Gain Control Register (XTALCTR) ....................... 1805
33.3 Operation ........................................................................................................................ 1806
33.3.1 Sleep Mode ..................................................................................................... 1806
33.3.2 Software Standby Mode .................................................................................. 1807
33.3.3 Software Standby Mode Application Example ............................................... 1810
33.3.4 Deep Standby Mode ........................................................................................ 1811
33.3.5 Module Standby Function ............................................................................... 1817
33.3.6 Adjustment of XTAL Crystal Oscillator Gain ................................................ 1817
33.4 Usage Notes .................................................................................................................... 1818
33.4.1 Usage Notes on Setting Registers ................................................................... 1818
33.4.2 Usage Notes when the Realtime Clock is not Used ........................................ 1818
Section 34 User Debugging Interface .............................................................. 1819
34.1 Features ........................................................................................................................... 1819
34.2 Input/Output Pins ............................................................................................................ 1820
34.3 Description of the Emulation Command Registers ......................................................... 1821
34.3.1 Bypass Register (SDBPR) .............................................................................. 1821
34.3.2 Instruction Register (SDIR) ............................................................................ 1821
34.3.3 Enable Register (SDENR) .............................................................................. 1823
34.4 Operation ........................................................................................................................ 1824
34.4.1 TAP Controller ............................................................................................... 1824
34.4.2 Reset Configuration ........................................................................................ 1825
34.4.3 TDO Output Timing ....................................................................................... 1825
34.4.4 User Debugging Interface Reset ..................................................................... 1826
34.4.5 User Debugging Interface Interrupt ................................................................ 1826
34.5 Usage Notes .................................................................................................................... 1827
Section 35 Motor Control PWM Timer ........................................................... 1829
35.1 Features ........................................................................................................................... 1829
35.2 Input/Output Pins ............................................................................................................ 1831