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Section 23 CD-ROM Decoder
R01UH0134EJ0400 Rev. 4.00 Page 1215 of 2108
Sep 24, 2014
SH7262 Group, SH7264 Group
Bit Bit Name
Initial
Value R/W Description
4 ST_
ECCNG
0 R Indicates that error correction was not possible.
This bit is also set to 1 on detection of a short sector.
3 ST_ECCP 0 R Indicates that P-parity errors were not corrected in ECC
correction.
This bit is only valid when synchronization is normal
(the sector is neither short nor long).
This bit is set to 1 when the result of syndrome
calculation for P parity is non-0.
2 ST_ECCQ 0 R Indicates that Q-parity errors were not corrected in ECC
correction.
This bit is only valid when synchronization is normal
(the sector is neither short nor long).
This bit is set to 1 when the result of syndrome
calculation for Q parity is other than all 0s.
1 ST_EDC1 0 R Indicates that the result of the EDC check before ECC
correction was ‘fail’.
This bit is also set to 1 if a short sector is encountered
while EDC is enabled.
0 ST_EDC2 0 R Indicates that the result of the EDC check after ECC
correction was ‘fail’.