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Section 5 Clock Pulse Generator
R01UH0134EJ0400 Rev. 4.00 Page 119 of 2108
Sep 24, 2014
SH7262 Group, SH7264 Group
5.3 Clock Operating Modes
Table 5.2 shows the relationship between the combinations of the mode control pins (MD_CLK1
and MD_CLK0) and the clock operating modes. Table 5.3 shows the usable frequency ranges in
the clock operating modes.
Table 5.2 Clock Operating Modes
Mode
Pin Values Clock I/O
Divider 1
PLL Circuit
On/Off CKIO Frequency MD_CLK1 MD_CLK0 Source Output
0 0 0 EXTAL or
crystal
resonator
CKIO 1 ON
(12)
(EXTAL or crystal
resonator) 4
1 0 1 USB_X1 or
crystal
resonator
CKIO 1/4 ON
(12)
(USB_X1 or crystal
resonator)
2 1 0 EXTAL or
crystal
resonator
CKIO 1 ON
(8)
(EXTAL or crystal
resonator) 4
3 1 1 USB_X1 or
crystal
resonator
CKIO 1/3 ON
(8)
(USB_X1 or crystal
resonator) 4/3
Mode 0
In mode 0, clock is input from the EXTAL pin or the crystal oscillator. The PLL circuit shapes
waveforms and multiples the frequency, and then supplies the clock to the LSI. The oscillating
frequency for the crystal resonator and EXTAL pin input clock ranges from 10 to 12 MHz.
The frequency range of CKIO is from 40 to 48 MHz. To reduce current supply, fix the
USB_X1 pin (connect it to a pull-up/down resistor, the power supply, or the ground) and open
the USB_X2 pin when the USB 2.0 host/function module is not used.
Mode 1
In mode 1, clock is input from the USB_X1 pin or the crystal oscillator. The external clock is
input through this pin and waveform is shaped in the PLL circuit. Then the frequency is
multiplied according to the frequency control register setting before the clock is supplied to the
LSI. The frequency of CKIO is the same as that of the input clock (USB_X1/crystal resonator)
(48 MHz). To reduce current supply, fix the EXTAL pin (connect it to a pull-up/down resistor,
the power supply, or the ground) and open the XTAL pin when the LSI is used in mode 1.