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Section 12 Compare Match Timer
R01UH0134EJ0400 Rev. 4.00 Page 649 of 2108
Sep 24, 2014
SH7262 Group, SH7264 Group
Section 12 Compare Match Timer
This LSI has an on-chip compare match timer module consisting of two-channel 16-bit timers.
This module has a 16-bit counter, and can generate interrupts at set intervals.
12.1 Features
Independent selection of four counter input clocks at two channels
Any of four internal clocks (P/8, P/32, P/128, and P/512) can be selected.
Selection of DMA transfer request or interrupt request generation on compare match by direct
memory access controller setting
When not in use, this module can be stopped by halting its clock supply to reduce power
consumption.
Figure 12.1 shows a block diagram.
Pφ/8 Pφ/32 Pφ/128 Pφ/512 Pφ/8 Pφ/32 Pφ/128 Pφ/512
CMSTR:
CMCSR:
CMCOR:
CMCNT:
CMI:
Compare match timer start register
Compare match timer control/status register
Compare match constant register
Compare match counter
Compare match interrupt
[Legend]
Peripheral bus
Bus
interface
Control circuit
Clock selection
CMSTR
CMCSR_0
CMCOR_0
Comparator
CMCNT_0
Module bus
Channel 0 Channel 1
CMI0 CMI1
Control circuit
Clock selection
CMCSR_1
CMCOR_1
Comparator
CMCNT_1
Compare match timer
Figure 12.1 Block Diagram