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Section 24 A/D Converter
R01UH0134EJ0400 Rev. 4.00 Page 1273 of 2108
Sep 24, 2014
SH7262 Group, SH7264 Group
24.4.3 Scan Mode
Scan mode is useful for monitoring analog inputs in a group of one or more channels at all times.
In scan mode, A/D conversion is performed sequentially for a maximum of eight specified analog
input channels, as follows:
1. A/D conversion starts from the analog input channel with the lowest number (e.g. AN0, AN1,
…, AN3) when the ADST bit in ADCSR is set to 1 by software, the multi-function timer pulse
unit 2, or external trigger input.
2. When A/D conversion is completed on each channel, the A/D conversion result is sequentially
transferred to the A/D data register corresponding to that channel.
3. After A/D conversion on all selected channels has completed, the ADF bit in ADCSR is set to
1. If the ADIE bit is set to 1 at this time, an ADI interrupt request is generated. The A/D
converter starts A/D conversion again from the channel with the lowest number.
4. The ADST bit is not cleared automatically, so steps 2. and 3. are repeated as long as the ADST
bit remains set to 1. When the ADST bit is cleared to 0, A/D conversion halts and the A/D
converter becomes idle.
The ADF bit is cleared by reading ADF while ADF = 1, then writing 0 to the ADF bit.
When the operating mode or analog input channel selection must be changed during A/D
conversion, to prevent incorrect operation, first clear the ADST bit to 0 to halt A/D conversion.
After making the necessary changes, set the ADST bit to 1. A/D conversion will start again from
the first channel in the group. The ADST bit can be set at the same time as the mode or channel
selection is changed.
Typical operations when three channels (AN0 to AN2) are selected in scan mode are described as
follows. Figure 24.4 shows a timing diagram for this example.
1. Scan mode is selected (MDS2 = 1, MDS1 = 1), analog input channels AN0 to AN2 are
selected (CH[2:0] = 010), and A/D conversion is started (ADST = 1).
2. A/D conversion of the first channel (AN0) starts. When A/D conversion is completed, the A/D
conversion result is transferred into ADDRA.
3. Next, the second channel (AN1) is selected automatically and A/D conversion starts.
4. Conversion proceeds in the same way through the third channel (AN2).
5. When conversion of all the selected channels (AN0 to AN2) is completed, the ADF flag is set
to 1 and conversion of the first channel (AN0) starts again. If the ADIE bit is set to 1 at this
time, an ADI interrupt is requested.