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Section 18 Serial Sound Interface
Page 904 of 2108 R01UH0134EJ0400 Rev. 4.00
Sep 24, 2014
SH7262 Group, SH7264 Group
Bit Bit Name
Initial
Value R/W Description
9 PDTA 0 R/W
PDTA = 1
DWL[2:0] SSITDR/SSIRDR[31:0]
000
31 24 23 16 15 8 7
0
1st word 2nd word 3rd word
4th word
001
31 16 15
0
1st word
2nd word
010
31 18 17
0
Invalid
Valid
011
31 20 19
0
Invalid
Valid
100
31 2221
24 23
0
Invalid
Valid
101
31
0
Invalid
Valid
110
31 0
Valid
8 DEL 0 R/W Serial Data Delay
0: 1 clock cycle delay between SSIWS and SSIDATA
1: No delay between SSIWS and SSIDATA