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Section 38 States and Handling of Pins
R01UH0134EJ0400 Rev. 4.00 Page 2061 of 2108
Sep 24, 2014
SH7262 Group, SH7264 Group
38.4 Recommended Combination of Bypass Capacitor
Mount a multilayer ceramic capacitor between a pair of the power supply pins as a bypass
capacitor. These capacitors must be placed as close as the power supply pins of the LSI. The
capacitance of the capacitors should be used 0.1 F to 0.33 F (recommended values). For details
of the capacitor related to the crystal resonator, see section 5, Clock Pulse Generator.
Figures 38.1 and 38.2 are examples of externally allocated capacitors in the SH7262 Group and
SH7264 Group, respectively.
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PLQP0176KB-A
Top view
PF9
PF8
PF7
PF6
PF5
PF4
PF3
PF2
PVcc
PF1
Vss
PF0
Vcc
PE5
PE4
PE3
PE2
PE1
PE0
PVcc
Vss
PD15
PD14
PD13
PD12
PD11
PD10
Vss
PVcc
PD9
PD8
PD7
PD6
PD5
PD4
PD3
Vcc
PD2
Vss
PD1
PVcc
PD0
PC0
PC1
PC2
PC3
PC4
PC5
PC6
Vcc
PC7
Vss
PC8
PVcc
PB1
PB2
PB3
PB4
PB5
PB6
PB7
Vcc
PB8
Vss
PB9
PVcc
PB10
PB11
PB12
PB13
PB14
PB15
Vcc
PB16
Vss
CKIO
PVcc
PB17
PB18
PB19
PB20
PB21
PB22
Vcc
Vss
PVcc
RES
NMI
Vcc
PF10
Vss
PF11
PVcc
PF12
AUDIO_X1
AUDIO_X2
PG0
PG1
Vcc
PG2
Vss
PG3
PVcc
PG4
PG5
PG6
PG7
PG8
PG9
PG10
Vcc
PG11
Vss
PG12
PVcc
PG13
PG14
PG15
PG16
PG17
PG18
PG19
PG20
Vcc
Vss
PVcc
TCK
TMS
TDI
TDO
ASEBRKAK/ASEBRK
TRST
AVcc
AVref
AVss
PH3
PH2
PH1
PH0
USBUVss
USBUVcc
USBAVss
USBAVcc
USBAPVss
USBAPVcc
REFRIN
USBDVss
USBDVcc
VBUS
DP
DM
USBDPVss
USBDPVcc
ASEMD
USB_X2
USB_X1
PVcc
PJ0
Vss
PJ1
Vcc
PJ2
PJ3
Vss
RTC_X2
RTC_X1
PVcc
Vss
PA0
PA1
XTAL
EXTAL
PA2
PLLVss
PA3
PLLVcc
Figure 38.1 Example of Externally Allocated Capacitors in the SH7262 Group