Renesas R5S72640 Doll User Manual


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Section 11 Multi-Function Timer Pulse Unit 2
R01UH0134EJ0400 Rev. 4.00 Page 431 of 2108
Sep 24, 2014
SH7262 Group, SH7264 Group
Section 11 Multi-Function Timer Pulse Unit 2
This LSI has an on-chip multi-function timer pulse unit 2 that comprises five 16-bit timer
channels.
11.1 Features
Maximum 16 pulse input/output lines
Selection of eight counter input clocks for each channel
The following operations can be set:
Waveform output at compare match
Input capture function
Counter clear operation
Multiple timer counters (TCNT) can be written to simultaneously
Simultaneous clearing by compare match and input capture is possible
Register simultaneous input/output is possible by synchronous counter operation
A maximum 12-phase PWM output is possible in combination with synchronous operation
Buffer operation settable for channels 0, 3, and 4
Phase counting mode settable independently for each of channels 1 and 2
Cascade connection operation
Fast access via internal 16-bit bus
25 interrupt sources
Automatic transfer of register data
A/D converter start trigger can be generated
Module standby mode can be settable
A total of six-phase waveform output, which includes complementary PWM output, and
positive and negative phases of reset PWM output by interlocking operation of channels 3 and
4, is possible.
AC synchronous motor (brushless DC motor) drive mode using complementary PWM output
and reset PWM output is settable by interlocking operation of channels 0, 3, and 4, and the
selection of two types of waveform outputs (chopping and level) is possible.
In complementary PWM mode, interrupts at the crest and trough of the counter value and A/D
converter start triggers can be skipped.