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Easy I/O for DAQ Library Chapter 10
LabWindows/CVI Standard Libraries 10-36 © National Instruments Corporation
• pulseWidth is the desired duration of the pulse (phase 2) after the delay
• The unit is seconds if timebaseSource is USE_INTERNAL_TIMEBASE and cycles if
timebaseSource is USE_COUNTER_SOURCE.
• If pulseDelay = 0.0 and timebaseSource is internal, the function selects a minimum delay of
three cycles of the timebase used.
timebaseSource is the signal that causes the counter to count. This parameter accepts the
following attributes:
• USE_INTERNAL_TIMEBASE—An internal timebase is selected based on the pulse delay
and width, in units of seconds.
• USE_COUNTER_SOURCE—The signal on the counter's SOURCE pin is used and the units
of pulse delay and width are cycles of that signal.
gateMode specifies how the signal on the counter's GATE pin is used. This parameter accepts
the following attributes:
• UNGATED_SOFTWARE_START—ignore the gate signal and start when CounterStart is
called.
• COUNT_WHILE_GATE_HIGH—count while the gate signal is TTL high after
CounterStart is called.
• COUNT_WHILE_GATE_LOW—count while the gate signal is TTL low after
CounterStart is called.
• START_COUNTING_ON_RISING_EDGE—start counting on the rising edge of the TTL
gate signal after CounterStart is called.
• START_COUNTING_ON_FALLING_EDGE—start counting on the falling edge of the TTL
gate signal after CounterStart is called.
• RESTART_ON_EACH_RISING_EDGE—restart counting on each rising edge of the TTL
gate signal after CounterStart is called.
• RESTART_ON_EACH_FALLING_EDGE—restart counting on each falling edge of the TTL
gate signal after CounterStart is called.
pulsePolarity is the polarity of phase 2 of each cycle. This parameter accepts the following
attributes:
• POSITIVE_POLARITY—the delay (phase 1) is a low TTL level and the pulse (phase 2) is a
high level.
• NEGATIVE_POLARITY—the delay (phase 1) is a high TTL level and the pulse (phase 2) is
a low level.