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iAPx
432
Interface
Processor
Architecture
Reference
Manual
To
sunmar
ize,
the
Attached
Processor
and
the
Interface
Processor
interact
with
each
other
by means
of
address
references
generated
by
the
AP and
interrupts
generated
by
the
IP.
Since
the
Interface
Processor
respoms
to
memory
references,
other
active
Peripheral
Subsystem
agents
(bus
masters),
such
as
~
controllers,
may
obtain
access
to
432
system
memory
via
the
IP's
windows.
PERIPHERAL
SUBSYSTEM
INTERFACE
SOFIWARE
I/O
CCNrroLIER
The Per
ipheral
Subsystem
interface
is
managed
by
software,
which
this
manual
refers
to
as
the
I/O
controller.
The
I/O
controller
executes
on
the
Attached
Processor
and
uses
the
facilities
provided
by
the
AP and
the
IP
to
control
the
flay
of
data
between
the
432
system and
the
Peripheral
Subsystem.
432
hardware
inposes
00
constraints
on
the
structure
of
the
I/O
controller.
Tb
help
simplify
software
organization
and
modification,
implementors
may
wish
to
consider
organizing
it
as
a
collection
of
tasks
running under
the
control
of
a
multitasking
operating
system (such
as
iRMX-80™,
iRMX-88™,
or
iRMX-86'lM)
•
This
type
of
organization
supports
asynchronous
message-based
conmunication
within
the
I/O
controller,
similar
to
the
432' s
intr
insic
interprocess
oommunication
facility.
Extending
this
approach
to
the
device
task
as
well
results
in
a
consistent,
system-wide conmunication
nndel.
Havever, corrmunication wi
thin
the
I/O
controller
am
between
the
I/O
controller
am
device
tasks,
is
oqrnpletely
application-defined.
It
may
also
be
~lemented
via
synchronous
procedure
calis,
with
"messages"
being
passed
in
the
form
of
parameters.
However
it
is
structured,
the
I/O
controller
interacts
with
the
432
system through
facilities
provided
by
the
Interface
Processor.
There
are
three
of
these
facilities:
execution
environments,
windows,
am
fuoctions.
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