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iAPX
432
Interface
Processor
Architecture
Reference Manual
The
2-bit
transfer
direction
subfield
indicates
the
types
of
read/write
requests
from
the
associated
Peripheral
Subsystem which
are
valid
with
respect
to
this
map
entry.
The
low
order
bit
of
the
transfer
direction
subfield
is
interpreted
as
follows:
o - reading
may
not
occur
1 - reading
may
occur
The
high
order
bit
of
the
transfer
direction
subfield
is
interpreted
as
follows:
o -
wr
iting
may
not
occur
1 -
writing
may
occur
Note
that
both
bits
may
not
be
set
when
setting
block
transfer
mode.
The
2-bit
transfer
state
subfield
irrlicates
the
state
of
the
transfer.
It
is
encoded
as
follows:
00
-
transfer
in
progress
01
-
transfer
terminated
upon count runout
10
-
transfer
termination
forced
11
-
transfer
termination
upon
fault
The
I-bit
memory
overlay
subfield
irrlicates
whether
or
not
the
Peripheral
Subsystem
address
subrange
associated
with
this
map
entry
overlays
physical
memory
in
the
Peripheral
Subsystem.
If
physical
memory
is
overlayed,
whenever an address
is
mapped
via
this
entry
a
Per
ipheral
Subsystem
rus
protocol
is
employed which
prevents
that
overlayed
memory
from responding. A value
of
zero
indicates
that
no
memory
is
overlayed.
A
value
of
one
irrlicates
that
memory
is
overlayed.
The
base address
field
is
used
to
specify
the
starting
address
of
the
Peripheral
Subsystem
address
subrange
mapped
h¥
this
map
entry.
Subranges
are
2**n
bytes
in
length
with
n being
in
the
range
zero
to
sixteen.
A
subr
ange
of
a
given
pcMer
of
two
in
size
must appear on
an addressing boundary
of
the
same
power
of
two
(e.g.,
a
16
byte
subr
ange
rust
begin on a
16
byte
boundary).
Stated
another way, a
sub range
of
2**n
bytes
in
length
will
thus
have a
starting
address
containing
at
least
n
trailing
zeros.
Base addresses
are
always an
integer
multiple
of
an
integer
pcMer
of
two
(i.e.,
m*2**n).
The
n
is
as
described
above.
The
m
is
any
integer
such
that
the
above
conditions
hold and
the
value
of
the
starting
address
is
limited
to
the
range 0
to
65,535.
The
mask
field
contains
a
mask
which
is
used
to
specify
the
size
of
the
Peripheral
Subsystem address subrange
to
be
mapped
by
this
map
entry.
The
mask
is
composed
of
two contiguous
bit
string
subfields.
The
higher-order
bi
t
string
contains
all
ones.
The
lower-order
bit
string
contains
all
zeros.
The
mapped
address
subrange
is
2**(number
of
zeros
in
the
lower-order
bit
string)
bytes
in
length
beginning
at
the
starting
address.
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