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APPENDIX
E
SYSTEM
INITIALIZATICN
System
initialization
may
be
considered
as
a sequence
of
activities
that
brings
a 432-based system from an
arbitrary
state
to
a
known
state
where
execution
can
begin.
Although
the
initialization
sequence
will
vary
widely
among
applications,
this
appendix
outlines
the
basic
procedure. The
first
section
describes
how
the
system
may
be
reset
to
a
krnm
state.
The
second
section
shows
how
an
Interface
Processor running
in
physical
reference
mode
may
be used
to
initialize
memory
and
interconnect
components
thereby
establishing
an environment
in
which execution can
take
place.
The
final
section
discusses
system
startup,
the
procedure
for
commencing
execution.
E-I.
SYSTEM
RESEr
r.t>st systems
include
a
reset
swi
tch
that
is
used
to
initialize
the
system
after
power-up and
to
restart
the
running system
if
necessary.
In
a
432
system,
the
!NIT
pins
of
all
IPs
(see
iAPX
43203
VISI
Interface
Processor
Data
Sheet,
Order
No.
171874,
for
details)and
GDPs,
and
the
RESEr
(or
equivalent)
pins
of
all
Peripheral
Subsystem components must be
activated
when
a
full
system
reset
is
performed. However, system
designers
may
also
decide
to
provide
the
option
to
selectively
initialize
elements
of
a
432
system.
Although
this
is
subject
to
variation,
a
typical
Attached
Processor
responds
to
a
reset
pulse
by
aborting
any
current
operation,
disabling
interrupts
and
then
vectoring
execution
to
the
code
located
at
same
predefined
address
(typically
in
non-volatile
merrory)
•
The
code
will
normally
initialize
I/O
devices
and
enable
interrupts,
at
which
point
normal
execution
begins.
The
432
makes
no
special
demands
of
the
Peripheral
Subsystem
except
that
it
should
be
prepared
to
handle an
interrupt
request
from
the
IP
shortly
after
system
reset.
E-l