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iAPX
432
Interface
Processor
Architecture
Reference
Manual
Note
that
the
term
"processor
obj
ect"
above
is
meant
to
include
ccmnunication
segments,
am
a
processor
carrier,
in
addition
to
processor
access
and
data
segments.
Likewise,
"process
object"
includes
a domain,
instruction
segments,
context
objects,
etc.
This
environment
may
be
extended
to
include
nnre
processors,
processes,
ports
and
so
on,
as
is
appropriate
for
a
given
application.
The
initial
execution
environment
may
not
pre-exist
in
432
non-volatile
memory,
since
the
processors
routinely
update
the
objects
during
execution.
Therefore,
the
initial
environment
must
be
loaded
from a
Peripheral
Subsystem (where
it
may,
in
fact,
reside
in
non-volatile
storage).
One
Peripheral
Subsystem
will
typically
be
designated
to
load
the
initial
environment
in
physical
reference
mode;
in
this
discussion
this
Peripheral
Subsystem
is
referred
to
as
the
initializing
AP.
At
no
time
during
system
initialization
should
nnre
than
one
Peripheral
Subsystem
be
updating
432
system
memory.
In
most
applications,
the
remaining
Peripheral
Subsystems
will
refrain
from
accessing
the
432
system
until
their
IPs
have
switched
to
logical
reference
mode.
It
is
possible,
however,
for
a
second
Peripheral
Subsystem
to
read
432
system
memory
while
still
in
physical
reference
mode;
some
applications
may
wish
to
designate
a second
Peripheral
Subsystem
to
monitor
the
activity
of
the
initializing
AP
in
this
way.
Same
systems
will
need
to
perform
a number
of
preliminary
activities
before
the
initial
environment
can
be
loaded.
These
acti
vi
ties,
which
will
be
defined
by
each
application,
may
include:
o
ascertaining
the
system
configuration
(i.e.,
the
number and
type
of
processors
present,
and
the
amount
of
memory
available);
o
verifying
that
system
components
are
operational;
o
initializing
registers
located
in
the
interconnect
space
(e.g.,
address
range
or
error
count
registers
in
memory
controllers);
o
initializing
error
checking
and
correcting
(EOC)
memory.
Windows
0 and 1
may
be
useful
in
connection
with
these
preliminary
.
activities.
Window
1
could
be
used
to
read
system
configuration
information
encoded
in
predefined
registers
of
the
interconnect
address
space,
for
example.
Window
1
may
also
be
used
to
initialize
registers
in
memory
controllers,
provided
these
registers
are
located
in
the
first
32K
bytes
of
the
interconnect
address
space.
E-4