Formatter-control system
The formatter is responsible for the following procedures:
●
Controlling sleep mode
●
Receiving and processing print data from the various product interfaces
●
Monitoring control-panel functions and relaying product-status information (through the control
panel and the network or bidirectional interface)
●
Developing and coordinating data placement and timing with the DC controller PCA
●
Storing font information
●
Communicating with the host computer through the network or the bidirectional interface
The formatter receives a print job from the network or bidirectional interface and separates it into image
information and instructions that control the printing process. The DC controller PCA synchronizes the
image-formation system with the paper-input and -output systems, and then signals the formatter to
send the print-image data.
The formatter also provides the electrical interface and mounting locations for one EIO card and an
additional DIMM.
Sleep mode
NOTE: In the SYSTEM SETUP menu, this item is termed SLEEP DELAY.
This feature conserves power after the product has been idle for an adjustable period of time. When the
product is in SLEEP DELAY, the control-panel backlight is turned off, but the product retains all settings,
downloaded fonts, and macros. The default setting is for SLEEP DELAY to be enabled, and the product
enters SLEEP DELAY after a 30-minute idle time.
The product exists SLEEP DELAY and enters the warm-up cycle when any of the following events
occur:
●
A print job, valid data, or a PML or PJL command is received
●
A control-panel button is pressed
●
A cover is opened
●
A paper tray is opened
●
The engine-test switch is pressed
NOTE: Product error messages override the Sleep message. The product enters SLEEP DELAY at
the appropriate time, but the error message continues to appear.
Input/output
The product receives print data primarily from the embedded HP Jetdirect print server. The product also
has a USB 2.0 port for connecting directly to a computer.
CPU
The formatter incorporates a 540 MHz Coldfire processor.
4 Chapter 1 Theory of operation ENWW
