6.6.3InterruptHandling
6.7PSCRegisters
PSCRegisters
HandlethePSCinterruptsasdescribedinthefollowingprocedure:
First,enabletheinterrupt.
1.SettheEMUIHBIEbitandtheEMURSTIEbitinMDCTL39toenabletheinterrupteventsthatyou
want.
Note:ThePSCinterruptPSCINTissenttotheDSPinterruptcontrollerwhenatleastoneenabled
eventbecomesactive.
2.Enablethepowerandsleepcontrollerinterrupt(PSCINT)intheDSPinterruptcontroller.Tointerrupt
theDSP,PSCINTmustbeenabledintheDSPinterruptcontroller.SeeSection2.4.1formore
information.
TheDSPenterstheinterruptserviceroutine(ISR)whenitreceivestheinterrupt.
1.ReadtheMnbitinMERRPR1todeterminethesourceoftheinterrupt(s).NotethatontheDM643x
DMP,onlyM[39]cancauseaninterrupt.
2.Foreachactiveeventthatyouwanttoservice:
•ReadtheeventstatusbitsinMDSTAT39,dependingonthestatusbitsreadinthepreviousstepto
determinetheeventthatcausedtheinterrupt.
•Servicetheinterruptasrequiredbyyourapplication.
•WritetheM[39]bitinMERRCR1toclearcorrespondingstatus.
•SettheALLEVbitinINTEVALto1.SettingthisbitreassertsthePSCINTtotheDSPinterrupt
controller,iftherearestillanyactiveinterruptevents.
Table6-5liststhememory-mappedregistersforthePSC.Seethedevice-specificdatamanualforthe
memoryaddressoftheseregisters.
Table6-5.PowerandSleepController(PSC)Registers
OffsetRegisterDescriptionSection
0hPIDPeripheralRevisionandClassInformationRegisterSection6.7.1
18hINTEVALInterruptEvaluationRegisterSection6.7.2
44hMERRPR1ModuleErrorPendingRegister1Section6.7.3
54hMERRCR1ModuleErrorClearRegister1Section6.7.4
120hPTCMDPowerDomainTransitionCommandRegisterSection6.7.5
128hPTSTATPowerDomainTransitionStatusRegisterSection6.7.6
200hPDSTAT[0]PowerDomainStatus0RegisterSection6.7.7
300hPDCTL[0]PowerDomainControl0RegisterSection6.7.8
800h-89ChMDSTAT0-39ModuleStatusnRegisterSection6.7.9
A00h-A9ChMDCTL0-39ModuleControlnRegisterSection6.7.10
68PowerandSleepControllerSPRU978E–March2008
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