Datasheet
29
Networkin
Silicon — GD82559ER
All accesses, either read or write, are preceded by a command instruction to the device. The
address field is six bits for a 64 register EEPROM or eight bits for a 256 register EEPROM. The
end of the address field is indicated by a dummy zero bit from the EEPROM, which indicates the
entire address field has been transferred to the device. An EEPROM read instruction waveform is
shown in the figure below.
The 82559ER performs an automatic read of seven words (0H, 1H, 2H, AH, Bh, Ch and DH) of the
EEPROM after the de-assertion of Reset.
The 82559ER EEPROM format is shown below in Figure 12.
Fi
ure 11. 64 Word EEPROM Read Instruction Waveform
Word1514131211109876543210
0H IA B
te 2 IA B
te 1
1H IA B
te 4 IA B
te 3
2H IA B
te 6 IA B
te 5
AH
Sig ID 0b BD Rev ID 1b DPD 0b 00b 0b STB
Ena
0b
BH Subs
stem ID
CH Subs
stem Vendor ID
DH Reserved
Fi
ure 12. 82559ER EEPROM Format
A
1
A
0
EECS
EESK
EEDI
EEDO
A
5
A
4
A
2
D
15
D
0
READ OP code
A
3
A
1
A
0
