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53
PRELIMINARY
2 Theory of Operation (continued)
2.5 Input Voltage Detection
Located at NH-SYS-P board (Auxiliary Power for System, Detect Circuit for Voltage and Current)
Located at NH-SYS-M board (System MCU and Control Circuit)
(a) MCU detects RMS value of bypass 3-phase voltage via Vbyp_R (89), Vbyp_S (91) and Vbyp_T (93).
(b) MCU detects RMS value of main input 3-phase voltage via Vin_R (92), Vin_S (94) and Vin_T (96).
(c) MCU detects the bypass frequency and zero crossing via BYPZO_R (12) at falling edge.
(d) MCU detects the main input frequency and zero crossing via INPZO_R (14) at falling edge.
IP/R
RP 1 6 5RP 1 6 4
CP 8 6
RP 1 7 4
RP 1 6 0
CP 8 3
5
6
7
UP20B
G1
RP 1 7 1RP 1 7 0 RP1 7 2
RP 1 6 6
IP/S
RP 1 8 1RP 1 8 0
RP 1 7 6
CP 8 7
10
9
8
UP20C
RP 1 8 2
IP/T
RP 1 8 9RP 1 8 8
RP 1 8 4
CP 8 8
12
13
14
UP20D
RP 1 9 0
IP/N
VinR
VinS
VinT
BYP/ R
RP162RP161
CP 9 5
RP173
RP159
CP 7 8
5
6
7
UP18B
G1
RP168RP167 RP169
RP163
BYP/ S
RP178RP177
RP175
CP 8 1
10
9
8
UP18C
RP179
BYP/ T
RP186RP185
RP183
CP 8 2
12
13
14
UP18D
RP187
Vby pR
Vby pS
Vby pT
IP/S
IP/R
IP/N
IP/T
BYP/ S
BYP/ R
BYP/ N
BYP/ T
1
2
3
4
5
6
7
CNP8
1
2
3
4
5
6
7
CNP7
BYP/ N
RM4 0
(89)
RM3 6
DM1
RM2 7
RM3 8
RM2 3
RM3 0
QM1
CM2 0
5VS
(12)
G1
Vby pR
G1
12
3
DM5
5VS
RM4 1
Vin_R
(92)
RM3 7
DM2
RM2 8
RM3 9
RM2 4
RM3 1
QM2
CM2 1
5VS
(14)
G1
VinR
G1
12
3
DM6
5VS
Vbyp_R
BY P ZO _ R INPZO_R
Vin_ R
RM5 3
(94)
RM5 1
G1
VinS
12
3
DM11
5VS
Vin_S
RM6 8
(96)
RM6 4
G1
VinT
12
3
DM17
5VS
Vin_T
RM5 4
(91)
RM5 0
G1
Vby pS
12
3
DM9
5VS
Vbyp_S
RM6 7
(93)
RM6 3
G1
Vby pT
12
3
DM16
5VS
Vbyp_T