6.14.2MinimizingLogicalChannelReconfigurationOverhead
6.14.3AddressingAutomaticEndianismConversionIssues
6.15Inter-AlgorithmSynchronization
6.15.1Non-PreemptiveSystem
Inter-AlgorithmSynchronization
SomecommonC55xDMAdevicesimposeadditionalrestrictionsthataffectwhenachannelneedstobe
reconfigured.Alogicalchannelneedstobereconfiguredwhenthesourceordestinationaddressesrefer
todifferentmemoryports(SARAM,DARAM,EMIF)comparedwiththemostrecentlyconfiguredchannel
settings.
Additionally,utilizingthereloadregistersisnotpossiblewhenthesourceordestinationaddresses
correspondtodifferentmemoryportscurrentlybeingusedbytheongoingtransfer.
DMAGuideline5
C55xalgorithmsshouldminimizechannelconfigurationoverheadbyrequestingaseparatelogical
channelforeachdifferenttransfertype.TheyshouldalsocallACPY2_configurewhenthesourceor
destinationaddressesbelonginadifferenttypeofmemory(SARAM,DARAM,External)ascompared
withthatofthemostrecenttransfer.
SomeC55x/OMAParchitecturesperformon-the-flyendianismconversionduringDMAtransfersbetween
DSPinternalMemory(SARAM/DARAM)andexternalmemory(viaEMIF).Certaincoherencyproblems
mayariseduetoautomaticenabling/disablingofendianismconversionbythehardware,basedonDMA
transfersettings,CPUaccessmodes,andaddressalignments.Inordertoensurecorrectoperationof
generalC55xalgorithmsonhardwarewithautomaticendianismconversionfollowingrulesregarding
alignment,size,andaccess,allrulesfordatabuffersthatmayresideinexternalmemorymustbe
followed.
DMARule10
C55xalgorithmsmustrequestalldatabuffersinexternalmemorywith32-bitalignmentandsizesin
multiplesof4(bytes).
DMARule11
C55xalgorithmsmustusethesamedatatypes,accessmodesandDMAtransfersettingswhenreading
fromorwritingtodatastoredinexternalmemory,orinapplication-passeddatabuffers.
AnidealsystemwithunlimitedDMAresourceswouldassignaphysicalDMAchanneltoeachlogical
channelrequestedbythealgorithmscomprisingthesystem.Unfortunately,theDMAresourceislimited
andsomeofthephysicalDMAchannelsmaybeusedforothersystemfunctionssuchasservicingserial
portsetc.Assuch,avarietyofapplicationscenariosarepossiblewithregardstosharingphysicalDMA
channels.Let'sconsidertwoscenariostoillustratehowthiscanbedealtwith:anon-preemptivesystem
andapreemptivesystem.
AssumeasystemwithonephysicalDMAchannelthathasbeenassignedtobeusedbytwoalgorithms.
Thealgorithmsrequireonelogicalchanneleach.Thealgorithmsdonotpreempteachother.
WeknowfromDMARule1thatuponreturnfromthealgorithmfunctions,theDMAisnotactive.The
systemcaneasilysharethissingleDMAchannelamongthetwoalgorithms,sincetheywillrun
sequentiallyandusetheDMAchannelsequentially.SeeSection6.15.2.
SPRU352G–June2005–RevisedFebruary2007UseoftheDMAResource71
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